(1) Field of the Invention
The present invention relates to a flattening method of a substrate, and a method of manufacturing a thin film transistor array panel using the same.
(2) Description of the Related Art
In general, thin film transistor array panels are used as circuit boards for independently driving pixels in liquid crystal displays or organic electro luminescence (“EL”) display devices. The thin film transistor array panels include a gate wire transmitting scan signals, a data wire transmitting image signals, a thin film transistor connected with the gate wire and the data wire, and a pixel electrode connected with the thin film transistor.
The thin film transistor is composed of a semiconductor layer forming a channel, a gate electrode of the gate wire, and a source electrode and a drain electrode of the data wire. The thin film transistor is a switching element that transmits or blocks data voltage transmitted through the data wire to the pixels, in response to a gate signal transmitted through the gate wire.
In manufacturing the thin film transistor, a metal layer is stacked first on a substrate as a wiring material for a gate or a source/drain electrode, and the metal layer is etched for implementing desired lines of an electric circuit. In the manufacturing process, portions of the metal layer are removed by using a gas or solution having corrosiveness.
The wires become narrow with the reduction in size and integration of the circuit, such that electrical resistance is relatively increased. Accordingly, copper has been under the spotlight as a row-resistant wiring material, instead of chromium, molybdenum, aluminum and alloys of them, which have been generally used as wiring materials in the related art.
However, copper does not bond well with a glass substrate or a silicon insulating layer, and is difficult to use in a single layer structure. A multilayer structure including the copper has been proposed. The multilayer structure uses a metal layer that bonds well with a glass substrate or a silicon insulating layer, for example a titanium layer, as a lower layer between the copper and the respective glass substrate or silicon insulating layer.
Etching solution containing fluoric acid is used to etch the entire multilayer. However, the etching solution containing fluoric acid etches not only the wires, but the substrate thereunder and leaves stains in subsequent manufacturing processes.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.